Saturday, January 19, 2013

Fun with RGB LED Strips - Part 4: STM32F4xx Clock Configuration

(Details of RCC configuration can be found in Section 5, "Reset and clock control (RCC)" in "RM0090 - Reference Manual - STM32F405xx, STM32F407xx, STM32F415xx and STM32F417xx advanced ARM-based 32-bit MCUs", available for download from ST Microelectronics.)

To arrive at a SPI bit rate of 6.4063 MHz:

1) Set M, N, and P to yield a main PLL frequency of 102.5 MHz.

VCO(in) = HSE / M, and must be 1 ≤ VCO(in) ≤ 2 MHz; set M = 4 to yield (HSE is an 8 MHz crystal):
VCO(in) = 8 MHz / 4 = 2 MHz

VCO(out) = VCO(in) × N, and must be 64 ≤ VCO(out) ≤ 432 MHz; set N = 205 to yield:
VCO(out) = 2 MHz × 205 = 410 MHz

PLL(general) = VCO(out) / P, and must be PLL(general) ≤ 168 MHz; set P = 4 to yield:
PLL(general) = 410 MHz / 4 = 102.5 MHz

Note that PLL(general) is SYSCLK.

(The value of Q, which divides VCO(out) for the USB OTG FS, SDIO, and RNG clocks, doesn't matter. I set mine to 9 to yield a rate of 45.6 MHz so that I could use the RNG if I chose, in which case the RNG clock must be ≤ 48 MHz.)

2) Set the HCLK (for AHB) divisor to 1 to yield an AHB clock of 102.5 MHz.

3) Set the PCLK1 (for APB1) and PCLK2 (for APB2) divisors to 4 and 2, respectively.

Constraints: max PCLK1 = 42 MHz; max PCLK2 = 84 MHz.

PCLK1 = HCLK / 4 = 102.5 MHz / 4 = 25.625 MHz (low speed APB1 bus clock)
PCLK2 = HCLK / 2 = 102.5 MHz / 2 = 51.25 MHz (high speed APB2 bus clock)

4) Set the SPI peripheral baud rate prescaler to 8 (for SPI1, on the high speed APB2 bus) or 4 (for SPI2 or SPI3, both on the low speed APB1 bus).

SPI baud rate = PCLKn / prescaler

For SPI1:
SPI baud rate = PCLK2 / 8 = 51.25 MHz / 8 = 6.4063 MHz

For SPI2 and SPI3:
SPI baud rate = PCLK1 / 4 = 25.625 MHz / 4 = 6.4063 MHz

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